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"CCD Vertex Detector"


As a candidate of the vertex detector for ILC, we propose a vertex detector based on fine pixel CCDs (FPCCD). In this idea, the hit signal is accumulated during a train and readout in 200ms interval between trains. We would carry out the R&D program including development of the new sensors, readout ASICs for them, and fabrication of prototype ladders.

Why FPCCD?
At ILC, 2820 bunches of electron and positron beam make collisions successively with 337ns bunch intervals. This succession of 2820 bunches is called "train", and trains are repeated at a rate of 5Hz. Due to low energy electron/positron beam background, the hit rate of the innermost layer of the vertex detector is estimated to be ≈1.5 hit/cm^2 at R=2.0 cm and B=3T for one bunch crossing (BX). If the hits are accumulated for one train, the hit density becomes very high, and the pixel occupancy for a pixel detector with 25μm pixel size exceeds 10%, which is not acceptable.

One method to keep the pixel occupancy acceptable level (≈0.5%) is to read out the sensors more than 20 times in one train. There are R&D activities by several groups based on this method. This method requires very fast readout speed, and the feasibility has not been demonstrated yet.

In the FPCCD vertex detector, we use very fine (≈5μm) pixel CCDs. The pixel occupancy will be less than 0.5% even if the hit signal is accumulated during a total train of 2820 bunches. In order to suppress the number of hit pixels due to diffusion in the epitaxial layer, the sensitive layer of the FPCCD should be fully depleted.

Recently, CCDs with the pixel size less than 5μm are used for digital cameras. So, we believe the FPCCD is technically the most feasible option for the vertex detector.

R&D goals
Our major R&D goals are;
  • Development of the new type of sensors (FPCCD)
  • Thinning of the wafers and their support structure
We also have to work on the following items;
  • Development of the readout ASIC
  • Minimization of the power consumption
  • Data compression and the backend electronics
  • Cooling system with minimum material
  • Thin beam pipe

Present activities
At present, detector simulation studies of the FPCCD vertex detector is being carried out at Tohoku University. A basic study of fully depleted CCDs (not fine pixel) using LASER light is done at KEK. In order to attack our major R&D goal, the funding support is absolutely insufficient.


Please address the following questions in your statement.

  • What are the goals of this R&D project. How does this R&D project address the needs of one or more of the detector concepts?

  • If there are multiple institutions participating in this project, please describe the distribution of responsibilities.

  • Are there significant recent results?

  • What are the plans for the near future(about 1 year)? What are the plans on a time scale of 2 to 3 years?

  • Are there critical items that must be addressed before significant results can be obtained from this project?

  • Is the support for this project sufficient? Are there significant improvements that could be made with additional support?