CBPM II DSP Test Program Pairs

This is a list of test program pairs to be used to exercise targeted functionality in the DSP. Each test requires a custom executable to be loaded into the DSP embedded in the test unit as well as a congruent control system program that will initiate communication with the DSP and control the test.

All LDR files and CTL program source code files live for the time being in the respective directory under [CESR.PALMER.TS101.TEST_DAQPACK]. All DSP source code and VDSP project files live for the time being in the respective directory on Unix under /home/tanke/cesr_home/ts101V4.

General

DSP EXE Name	Control System EXE Name	CTL Platform	Function
test_timing	GET_TIMING	VMS	Verifies write for all available timing chip registers. Timing registers are WRITE-ONLY. Hence they can't be checked with a readback test from the DSP or via the XBUS. test_timing loops through 2 global and 4 individual (card) delays; one may observe the delay using a scope probe on the DSP hardware
test_adcbuf	GET_ADCBUF	VMS	Loads test patterns into the front-end ADC buffers for readback over the serial XBUS.
test_adcbuf	GET_ADCBUF_ERR	VMS
test_adcbuf	PUT_ADCBUF	VMS
test_daq	GET_AVGS	VMS	Program to take ADC data where a channel to scan and a "start acquisition" flag are set from the control system. Note: start test_daq first, then set this flag. Averages over 100 turns. The timing scan data for all bunches on one channel are stored in static ram to be read back by the control system. Fixed timing step (size 64, i.e. 31 steps (0..30)).
test_daqmb	GET_AVGSMB	VMS	Like test_daq, but user specifies timing step size T_STEP. Print out of data only for data < pedestal (pedestal is hard coded in Fortran code)
test_sram	GET_SRAM	VMS	Writes and reads back data in SRAM; reports errors.
test_registers	N/A	Those able to write directly to DSP SRAM	Put a 2 at the base address of SRAM and it will test various registers: it sets a pattern into a given register and sets the same pattern into SRAM. It will also load the address of the register in SRAM. Flashing the DSP and executing this test is automatically done by executing get_registers.com - - - Put a 0 at the base address of SRAM in order to prepare for another test: write an address you wish to test into SRAM+2. If you wish to read the loaded address, write a 1 into SRAM+1; if you wish to write to it, write a 2 into SRAM+1. In the former case, SRAM+3 will contain the data read by the DSP from the address you supplied in SRAM+2. In the latter case, SRAM+3 will need to contain the data you wish to write to this address. Now put a 1 at the base address of SRAM in order to enable the test. Flashing the DSP and preparing for this test is automatically done by executing prep_patm_v4.com To execute this type of operation, type run patm_test_v4 (amongst others, this test will have the DSP read the first location in the PATM table).

Pertinent to BPM Operation

DSP EXE Name	Control System EXE Name	CTL Platform	Function
test_bpmtime	GET_BPMTIME	VMS	(raw) Functionality similar to the BSM timing scan
test_bpmraw	GET_BPMRAW	VMS	(raw) Functionality similar to the BSM test_10kraw program
test_bpmmultiraw	GET_BPMMULTIRAW	VMS	(raw) Functionality similar to the BSM test_multiraw program
test_bpmnavg	GET_BPMNAVG	VMS	(avg) User defines over how many turns data should be averaged, the number of averages to be made. The averages are calculated from one set of contiguous turns. The DSP will write averaged data to SRAM; the controls program will subsequently get the data from SRAM.
test_bpmlavg	GET_BPMLAVG	VMS	(avg) User defines over how many turns data should be averaged, the number of averages to be made, and the time between averages (expressed in number of turns). DSP will write averaged data to SRAM; after the number of averages specified have been stored, the controls program will get the data from SRAM.
test_bpmclock	GET_BPMCLOCK	VMS	The BPM modules have a clock register; this register needs to be set such as to have proper clocking of the data into the data buffers. This program tests for proper clock settings in the following fashion: Pedestal values are acquired over a (essentially unlimited) user defined number of turns; if no signal is present at the inputs, the acquired data should be at pedestal level +/- noise level. The user supplies a threshold many times the noise level; the program will count data beyond threshold. If the clock setting is a bad one, such counts will occur. Results are listed in two output files : clock_output.dat and clock_details.dat.

Pertinent to BSM Operation

DSP EXE Name	Control System EXE Name	CTL Platform	Function
test_daqpack	GET_PACK	VMS	Like test_daqmb, but averages over a user defined number of turns. Unlike test_daqmb, test_daqpack uses transfer of data arranged in packets. No pedestal in DSP code. --- GET_PACK gets data using vugetn (i.e. block data transfer) Pedestal hard coded in Fortran code; ADC data printed only if ADC value < pedestal.
test_daqpack	GET_PACKS	VMS	GET_PACKS gets data using vxgetn (i.e. single data transfer). No pedestal.
test_10k_raw	GET_10KRAW	VMS	Acquire raw data directly from the ADC buffers over a user defined number of turns for upto all ADC channels for selected bunches only. The bunch patterns are selected through a PGPLOT button interface. Xbus data transfer uses the PATM table (i.e. works with Xilinx Rev4 or newer only). The (fixed) timing is set by the user. The program will ask for a trigger mode; there are three ways to operate: not triggered, triggering on bit 0 of the GLOBAL_TURN_DAT register or triggering on bit 1 of this register. --- DSP routines: dsp_pedestal
test_multiraw	GET_MULTIRAW	VMS	Acquire raw data directly from the ADC buffers; similar to GET_10KRAW. Contains a software trigger such as to make a series of multi-turn snapshots before reading back the ADC buffers. The number of snapshots is limited by the available space in the ADC buffer(s).
test_300avg	GET_300AVG	VMS	Program to take raw ADC data over all channels for a user defined number of turns; the program averages these data and stores the average in SRAM. Loops over this a user supplied number of times (l.e. 300), thus creating up to 300 averages. 1 average per bunch per loop. For any one average, the average is over a contiguous sets of turns. From average to the next, data are NOT from contiguous sets of turns. Averages are calculated for selected bunches only. The bunch patterns are selected through a PGPLOT button interface. Xbus data transfer uses the PATM table (i.e. works with Xilinx Rev4 or newer only). The (fixed) timing is set by the user. With each set of turns, a time stamp is stored in SRAM.
test_300avg	GET_300AVG	VMS	UPDATE_300AVG works like GET_300AVG, except that it has a graphics interface, allowing the user to observe the amplitude for each and all of the 32 channels of a BSM in a single plot; the plot gets updated once every couple of seconds and plot is for T1B1 only.
test_300avg	GEO_RT	VMS	Like UPDATE_300AVG, but with spline fitting and printout of mean, sigma and integral.
test_navg	GET_NAVG	VMS	Program to take raw ADC data over all channels for a user defined number of turns; the program averages these data over a user supplied number of turns per average. Averages are then stored in SRAM.
test_navg	BSMFITTER	VMS	BSMFITTER is an on-line analysis program that takes the data acquired by test_navg and fits Gaussians to these data; it will subsequently plot pulse height, mu and sigma as a function of average number.
test_sum10	GET_SUM10	VMS	Program to take raw ADC data over all channels for 5 bunches, followed by a "pedestal" bunch and another 5 bunches. Example: T1B1..!T1B5, T1B14 and T2B1..!T2B5. In this case T1B1..T1B5 and T2B1..T2B5 data are summed such as to yield one such sum for each turn. T1B14 will serve later as pedestal in the analysis. Sum and pedestal are stored in the ADC buffers. Data are to be taken over 47000 turns or less.

Pertinent to FLM Operation

DSP EXE Name	Control System EXE Name	CTL Platform	Function
test_daqpavg	GET_PAVG	VMS	FLM timing scan. Like test_daqpack, but DSP program also does threshholding (see routine dsp_counts.c). Thresholded data are returned in higher portion of sram, counts for these data in lower portion of sram. Pedestal LC_PED=48500, threshhold LC_THRESH=-1200 and number of turns set to 2750 in DSP code. DSP routines: dsp_counts
test_daqpmca	GET_PMCA	VMS	Like test_daqpack, but DSP program also does multi channel analysis (MCA, see routine dsp_mca.c). User supplies ADC channel to look at (DSP stores only one ADC channel at a time in SRAM). Binning of average amplitude at a user specified point in time is done over the total number of turns. The total number of bins for each bunch is returned in lower portion of sram. Higher portion of sram contains the binned data. Pedestal LC_PED=48500, number of bins LC_NBINS=100 and MCA limits LC_MCA_MAX=0 and LC_MCA_MIN=-50000 are hard coded in the DSP code. DSP routines: dsp_mca
test_mc_mca	GET_MC_MCA	VMS	Like test_daqpmca, but DSP program stores data for ALL ADC channels and includes pedestal routine. MCA_MIN set to -50000.0 and MCA_MAX to 0.0, NBINS=80, number of turns set to 2750 (all hardcoded in DSP) DSP routines: dsp_mca, dsp_pedestal
test_24c_mca	GET_24C_MCA	VMS	Like test_mc_mca, but DSP program stores data for ADC channels 0..23 only. Data stored for bunches selected through bunch patterns only. GET_24C_MCA sets the appropriate pattern in SRAM; the DSP programs reads it and sets the bunch pattern registers accordingly. Number of bins, MCA_MIN and MCA_MAX are user supplied. Loops a user supplied number of times. Number of turns set to 2750 in DSP code. DSP code has 5 bunches of train 9 hardcoded for use as pedestals. Pedestal averages are read back by the control system. DSP routines: dsp_mca, dsp_pedestal
test_6c_hits	GET_6C_HITS	VMS	Looping over the ADC channels 1-6 only; innermost loop is over turns, next over channels, next over bunches. Looks at data over user supplied threshhold. Loops N_LOOPS times, whereby N_LOOPS is user supplied. Number of turns set to 2750 in DSP code. DSP code has 5 bunches of train 9 hardcoded for use as pedestals. DSP routines: dsp_counts, dsp_pedestal
test_6c_cont	GET_6C_CONT	VMS	Like test_6c_hits, but continuous looping. Data not only stored in a file, but also to the control system (if running on the control system). Counts hits over a user defined threshold and calculates pedestal subtracted averages for these hits. The pedestals are taken over PED_SAMPLES (=6503) turns (long enough to cover possible 60 Hz ripple). Luminosity data, corresponding to the sum of the 6 V channels, are taken over a user defined number of turns per sample and stored in flm_paw_lum.dat;1 Geometric data, corresponding to data from the 6 V channels individually and 14 horizontal channels, are taken over another user defined number of turns per sample and stored in flm_paw_ind.dat;1 Acquisition needs to be enabled by typing fff vxputn flm bun vert 320 320 1 or by typing @[CESR.PALMER.TS101.TEST_6C_CONT]ECA Enable the acquisition prior to starting get_6c_cont. Stop continuous acquisistion by typing fff vxputn flm bun vert 320 320 0 or by typing @[CESR.PALMER.TS101.TEST_6C_CONT]DCA -- DSP routines: dsp_pedestal