Cornell University Unit Name

"SOI-based vertex detector"

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Growing demands of the high energy physics experiments require novel solutions of semiconductor detectors characterised by improved parameters in terms of granularity, readout speed, radiation hardness and sensor thickness. Nowadays a common trend in the field of highly segmented ionising radiation detectors is the development of monolithic active pixel detectors, which allow integration of a pixel detector and readout electronics in one entity. It is expected that the monolithic approach will enable reducing material budget in future experiments and will allow lowering sensor costs due to the elimination of complicated bump-bonding flip-chip processing.

One of the methods that allow developing monolithic active pixel sensors is exploitation of the Silicon-on-Insulator (SOI) technology. A common SOI wafer consists of a thin layer of single-crystal silicon, separated from a bulk silicon substrate by an electrically insulating layer - typically silicon dioxide. In standard integrated circuits the top silicon film, called device layer, is used for manufacturing of electronic devices while the bottom silicon substrate, called support layer or handle wafer, acts only as a mechanical support. The multilayer structure of the SOI wafer may be advantageous for the design of monolithic active pixel sensors. The main idea is utilization of the silicon support layer as the radiation sensitive substrate of a monolithic detector and fabrication of the readout electronics in a conventional way in the device layer. Relying on this basic concept, a new monolithic pixel sensor has been developed. This device exploits commercially available wafer-bonded SOI substrates consisting of a high resistivity handle wafer and a low resistivity device layer. The proposed solution allows detector operation at the full depletion region and the integration of a fully complementary MOS readout circuitry in a sensor cell.

Development of a monolithic active pixel detector basing on SOI technology required a non-standard technology, integrating pixel manufacturing technique with typical CMOS process. The major challenges of such technology were processing from both sides of the buried oxide and preserving high quality detector diodes despite manufacturing steps of the CMOS devices in upper silicon layer. In order to match those demands, special technology, consisting of more than 120 processing steps, was developed at the Institute of Electron Technology. Using this technology, simple sensor test structures as well as first real-size prototypes (with active area of 1-4 square centimetres) were produced. The configuration of these sensors was imposed by requirements of medical applications of “Silicon Ultra-fast Cameras for Electron and Gamma Sources in Medical Applications” project (European Union GROWTH Project G1RD-CT-2001-000561), which was carried on from 2001 to 2004. The tests of the manufactured sensors proved their sensitivity to ionising radiation and opened the way for further development.

At present, the major research effort is focused on improvement of the production yield and noise performance of the SOI sensors. In order to reduce sensor dark currents, a joint research effort with a SOI substrate manufacturer is planed within a 1-year time-scale. From the point of view of the vertex detector application, one of the key issues of further SOI sensor development is moving sensor production into deep-submicron CMOS process. Technology redefinition will require 2-3 years. It will be followed by radiation hardness tests, detector back-thinning and development of fast readout architecture and signal pre-processing on-chip.

The SOI detector workgroup consists of AGH-University of Science and Technology in Krakow (Poland), Institute of Electron Technology in Warsaw (Poland) and Universita’ degli Studi dell’Insubria in Como (Italy). AGH is responsible for device-level simulations, technology verification, sensor design and tests, IET – for technology development and Universita’ dell’Insubria – for system-level integration.

The SOI detector R&D is currently supported by Polish funding agency, but the allocated resources are insufficient. Purchasing of SOI substrates and sensor prototyping require additional support.

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Please address the following questions in your statement.

• What are the goals of this R&D project. How does this R&D project address the needs of one or more of the detector concepts?

• If there are multiple institutions participating in this project, please describe the distribution of responsibilities.

• Are there significant recent results?

• What are the plans for the near future(about 1 year)? What are the plans on a time scale of 2 to 3 years?

• Are there critical items that must be addressed before significant results can be obtained from this project?

• Is the support for this project sufficient? Are there significant improvements that could be made with additional support?